1 ps8409d 03/19/01 product description pericom semiconductor?s pi3c series of logic circuits are produced using the company?s advanced submicron cmos technology, achieving industry leading performance. the PI3C16215 is a 20-bit bus switch with low on-state resistance. the bus switch creates no additional propagation delay. to minimize live-insertion noise, the device also precharges the b port to a user- selectable bias voltage (biasv). the switch is turned on by a single enable (oe) input. when oe is low, the switch is on and port a is connnected to port b. when oe is high, the switch between port a and port b is open and the b port is precharged to biasv through the equivalent of a 10k-ohm resistor. biasv 1 1a1 2 1a2 3 1a3 4 1a4 5 1a5 6 1a6 7 gnd gnd 8 1a7 9 1a8 10 1a9 11 1a10 12 2a1 13 2a2 14 v cc 15 2a3 16 2a4 17 2a5 18 2a6 19 2a7 20 2a8 21 2a9 22 2a10 23 24 1oe 2oe 1b1 1b2 1b3 1b4 1b5 gnd 1b6 48 1b7 47 1b8 46 1b9 45 1b10 44 2b1 43 2b2 42 2b3 41 gnd 40 2b4 39 2b5 38 2b6 37 2b7 36 2b8 35 2b9 34 2b10 33 32 31 30 29 28 27 26 25 product pin configuration logic diagram 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI3C16215 3.3v, 2-port, 20-bit bus switch with precharged outputs for live insertion product features ? near zero propagation delay ? 5-ohm switch connection between two ports ? high bandwidth (>200 mhz) ? rail-to-rail 3.3v switching ? outputs are precharged by bias voltage to minimize signal distortion during live insertion ? 5v i/o tolerant ? package options: ? 48-pin 150 mil wide plastic bqsop (b) ? 48-pin 240 mil wide plastic tssop (a) e on o i t c n u f lt r o p b = t r o p a hv s a i b = t r o p a , z = t r o p a truth table note: 1. h= high voltage level 2. l= low voltage level 2 b 1 2 b 10 2 oe 1 b 1 1 b 10 biasv 1 oe sw sw sw sw 1 a 1 1 a 10 2 12 48 13 24 47 25 35 46 36 1 48-pin a,b
2 ps8409d 03/19/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PI3C16215 3.3v, 2-port, 20-bit bus switch with precharged outputs for live insertion electrical characteristics (over recommended operating free-air temperature range) storage temperature...................................... ?65c to +150c supply voltage range .......................................... ?0.5v to 4.6v dc input voltage (1) ............................................ ?0.5v to +5.5v input clamp current, i ik (v 1 < 0) ..................................... ?50ma dc output current .......................................................... 120ma power dissipation (2) .......................................................... 0.5w note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. recommended operating conditions notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. the maximum package power dissipation is calculated using a junction temperatue of 150c and a board trace length of 750 mils . absolute maximum ratings over free-air temperature range * (above which the useful life may be impaired. for user guidelines, not tested.) notes: * measured by the voltage drop between the a and b terminals at the indicated current through the switch. on-state resistance is determined by the lower of the voltages of the two (a or b) terminals. ? this is the increase in supply current for control input. ? all typical values are at v cc = 3.3v, t a = 25c. s r e t e m a r a pn o i t p i r c s e ds n o i t i d n o c t s e t. n i mp y t . ? . x a ms t i n u v k i e g a t l o v e d o i d p m a l cv c c i , v 0 . 3 = n i 8 1 ? =ma 3 7 . 0 ?2 . 1 ?v i i t n e r r u c t u p n iv c c , v 6 . 3 =v n i v = c c d n g r o5 m a i o t n e r r u c t u p t u ov c c v , v 4 . 2 = v s a i b , v 0 . 3 = o 0 =5 2 . 0a m i c c t n e r r u c y l p p u s r e w o p t n e c s e i u qv c c i , v 6 . 3 = o , 0 =v n i v = c c d n g r o0 6 20 5 8 m a d i c c t u p n i r e p t n e r r u c y l p p u s r e w o p v c c , v 6 . 3 =v 7 . 2 t a t u p n i e n o t a r e h t ov c c d n g r o 5 . 2a m c n i e c n a t i c a p a c t u p n iv c c v 0 =5 . 3 f p c f f o e c n a t i c a p a c b / av c c , v 0 =f f o h c t i w s0 . 5 r n o * e c n a t s i s e r n o h c t i w sv c c v 0 . 3 = v n i i , 0 = n i 4 6 =a m55 . 8 w v n i i , v 4 . 2 = n i 0 3 =a m0 . 85 1 v n i i , v 4 . 2 = n i 5 1 =a m0 . 85 1 . n i m. x a ms t i n u v c c e g a t l o v y l p p u s0 . 33 . 3 v v s a i be g a t l o v y l p p u s3 . 1v c c v h i e g a t l o v t u p n i l e v e l - h g i h2 v l i e g a t l o v t u p n i l e v e l - w o l8 . 0 t a e r u t a r e p m e t r i a - e e r f g n i t a r e p o0 4 ?5 8c
3 ps8409d 03/19/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PI3C16215 3.3v, 2-port, 20-bit bus switch with precharged outputs for live insertion switching characteristics (over recommended operating free-air temperature range, c l = 50pf) note: 1. this parameter is warranted but not production tested. the propagation delay is based on the rc time constant of the typical on state resistance of the switch and a load capacitance of 50pf, when driven by an ideal voltage source (zero output impedance). parameter measurements voltage waveforms propagation delay times voltage waveforms enable and disable times t s e t1 s t d p n e p o t z l p t / l z p v 6 t z h p t / h z p d n g notes: 1. c l includes probe and jig capacitance. 2. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 3. all input pulses are supplied by generators having the following characteristics: prr<10mhz, z o = 50 w , t r 2.5ns, t f 2.5ns. 4. the outputs are measured one at a time with one transition per measurement. 5. t plz and t phz are the same as t dis . 6. t pzl and t pzh are the same as t en . 7. t plh and t phl are the same as t pd . t pzl output control (low level enabling) 0v 1.5v 1.5v 1.5v 1.5v t plz t phz v ol 3.5v 0v t pzh +0.3v -0.3v output waveform 1 s1 at 6v (see note 2) output waveform 2 s1 at open (see note 2) v oh v oh v ol 3v r e t e m a r a ps n o i t i d n o c t s e t ) t u p n i ( m o r f) t u p t u o ( o t . n i m. x a ms t i n u t d p ) 1 ( b r o aa r o b5 2 . 0 s n t h z p d n g = v s a i b n ob r o a 5 . 15 . 6 t l z p v 3 = v s a i b5 . 15 . 6 t z h p d n g = v s a i b n ob r o a 5 . 15 . 5 t z l p v 3 = v s a i b5 . 15 . 5 500 ohm 500 ohm 6v open gnd s1 load circuit from output under test cl = 50pf (see note 1)
4 ps8409d 03/19/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PI3C16215 3.3v, 2-port, 20-bit bus switch with precharged outputs for live insertion ordering information t r a pe g a k c a p - n i ph t d i we r u t a r e p m e t a 5 1 2 6 1 c 3 i p) 8 4 a ( p o s s t - 8 4l i m - 0 4 2 c o 5 8 + o t c o 0 4 ? b 5 1 2 6 1 c 3 i p) 8 4 b ( p o s q b - 8 4l i m - 0 4 2 pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com 48-pin tssop (a) package 48-pin bqsop (b) package .236 .244 .488 .496 .002 .006 seating plane .007 .010 .0197 bsc .004 .008 .319 1 48 12.4 12.6 6.0 6.2 0.50 0.17 0.27 8.1 0.05 0.15 0.09 0.20 x.xx x.xx denotes dimensions in millimeters .018 .030 0.45 0.75 .047 1.20 max bsc .014 .0157 bsc 0.40 0.356 .008 0.20 .002 .009 5 ? 0.05 0.25 .079 2.0 .010 0.25 gauge plane .150 .157 x.xx x.xx denotes dimensions in millimeters 3.80 4.00 .228 .244 5.80 6.20 .020 .029 0.50 0.75 .063 1.60 .015 0.381 .386 .394 9.80 10.00 .0051 .009 0.13 0.23 1 48 x 45 ? bsc nom max nom ref applications information logic inputs the logic control inputs can be driven up to +3.6v regardless of the supply voltage. for example, given a +3.3v supply, in may be driven low to 0v and high to 3.6v. driving in rail-to-rail? minimizes power consumption. power-supply sequencing proper power-supply sequencing is recommended for all cmos devices. always apply v cc before applying v bias and signals to input/output or control pins. rail-to-rail is a registered trademark of nippon motorola, ltd
|
